patch-2.4.14 linux/include/asm-ppc/cache.h

• Lines: 43
• Date: Fri Nov 2 17:43:54 2001
• Orig file: v2.4.13/linux/include/asm-ppc/cache.h
• Orig date: Mon May 21 15:02:06 2001

diff -u --recursive --new-file v2.4.13/linux/include/asm-ppc/cache.h linux/include/asm-ppc/cache.h
@@ -1,5 +1,5 @@
 /*
- * BK Id: SCCS/s.cache.h 1.5 05/17/01 18:14:24 cort
+ * BK Id: SCCS/s.cache.h 1.10 10/18/01 15:02:09 trini
  */
 /*
  * include/asm-ppc/cache.h
@@ -12,20 +12,25 @@
 #include <asm/processor.h>
 
 /* bytes per L1 cache line */
-#if !defined(CONFIG_8xx) || defined(CONFIG_8260)
-#if defined(CONFIG_PPC64BRIDGE)
-#define L1_CACHE_BYTES	128
+#if defined(CONFIG_8xx) || defined(CONFIG_403GCX)
+#define	L1_CACHE_LINE_SIZE	16
+#define LG_L1_CACHE_LINE_SIZE	4
+#define MAX_L1_COPY_PREFETCH	1
+#elif defined(CONFIG_PPC64BRIDGE)
+#define L1_CACHE_LINE_SIZE	128
+#define LG_L1_CACHE_LINE_SIZE	7
+#define MAX_L1_COPY_PREFETCH	1
 #else
-#define	L1_CACHE_BYTES  32
-#endif /* PPC64 */
-#else
-#define	L1_CACHE_BYTES	16
-#endif /* !8xx || 8260 */
+#define	L1_CACHE_LINE_SIZE  32
+#define LG_L1_CACHE_LINE_SIZE	5
+#define MAX_L1_COPY_PREFETCH	4
+#endif
+
+#define	L1_CACHE_BYTES L1_CACHE_LINE_SIZE
+#define	SMP_CACHE_BYTES L1_CACHE_BYTES
 
 #define	L1_CACHE_ALIGN(x)       (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))
 #define	L1_CACHE_PAGES		8
-
-#define	SMP_CACHE_BYTES L1_CACHE_BYTES
 
 #ifdef MODULE
 #define __cacheline_aligned __attribute__((__aligned__(L1_CACHE_BYTES)))